1. Field of the Invention
This invention relates generally to electronic memories and specifically to sense amplifiers of the type used with Random Access Memories (RAM's) having 1-transistor memory cells.
2. Prior Art
Considerable attention and effort has been focused on the production of large scale Random Access Memories (RAM's) using N-channel metal-oxide-semiconductor technology. This technology provides the promise of low-cost, moderately-high-speed and high-reliability memory devices of low-power consumption. Although many such memory devices are available commercially, they suffer from a variety of shortcomings and none have managed to fully realize the promise of the technology.
In these large scale RAM's the individual memory cells generally contain one transistor device and a charge storage capacitor. The memory cells are usually formed as part of an integrated circuit in a chip of semiconductor material and are arranged in an array of rows and columns with one sense amplifier often disposed midway along each column of memory cells. Such a configuration as compared to the situation where a sense amplifier is located at the end of each column, allows the inherent bit line capacitance in each column to be balanced at the sense amplifier. While such balancing of capacitance is in itself desirable, it results in the need to employ static circuit techniques which dissipate D.C. power during the operation of the memory to allow "write" and "read-modify-write" operations to be performed.
Process parameter variations associated with the fabrication of electronic memories as integrated circuits result in variations of sense amplifier input signals and the sense amplifier trip-point voltage from wafer to wafer. The trip-point voltage, defined with mathematical rigor hereinbelow, is an input signal voltage somewhat higher than the maximum input signal voltage required to cause the sense amplifier to read the binary state "0" and somewhat lower than the minimum input signal voltage required to cause the sense amplifier to read the binary state "1".
Sense amplifiers known in the prior art that are suitable for location at one end of a column of memory cells do not have built-in tracking capability between the sense amplifier input signal variations and the trip-point voltage variations. Therefore, many processed memory chips are scraped because their sense amplifier trip point voltages and input signal voltages are not properly positioned with respect to one another due to slight process variations. This scrapage, known as yield loss, increases the price of such memories.
Some RAM sense amplifiers use an imbalanced pair of cross-coupled transistors, i.e., one transistor physically larger than the other, to establish the trip-point voltage by regulating the flow of current from a pair of charged nodes. Because the characteristics of MOS transistors are affected by both size and configuration during processing and temperature during operation, the use of a pair of imbalanced transistors creates an inherent process and temperature dependency in the circuit. This is compensated for by imposing more stringent tolerances on the process parameter variations that affect the values of the sense amplifier input voltages and trip-point voltage. These more stringent tolerances result in lower yields and higher costs.
In some memories, each sense amplifier is not completely isolated from the other sense amplifiers. Therefore, when a row of memory cells is activated to interrogate a specific memory cell in a given column, some cross-talking occurs between sense amplifiers and the measurement of charge in the specified memory cell is sensitive to the pattern of information stored as charges in the other activated memory cells.